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Kirin 9050

Huawei After Sanctions: CIDM, Kirin 9050, and Logic Folding (Pt.2)
Huawei

Huawei After Sanctions: CIDM, Kirin 9050, and Logic Folding (Pt.2)

Cut off from EUV, Huawei is scaling a different way: folding two chips face to face so signals travel down rather than across. Part 2 explains why that raises clock speed without shrinking transistors, how the design repairs its own defects, and where the real wall lies.
26 min read 18 Sep 2026
Huawei After Sanctions: CIDM, Kirin 9050, and Logic Folding (Pt.1)
Huawei
13 min read 10 Sep 2026

Huawei After Sanctions: CIDM, Kirin 9050, and Logic Folding (Pt.1)

US sanctions bought time, not a lead. Huawei’s CIDM now ships Kirin 9050 with 1.5 µm wafer-to-wafer bonds — about 6× finer than TSMC SoIC. A coarse bond stacks two chips. A fine bond folds one circuit: two wafers, one netlist, one chip.

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